Semiconductor Yield / Defect Engineer (Wafer Fab SEM Review)

You will use production wafer-fab experience to review semiconductor defects and yield data for AI training. The work includes making evidence-based decisions about defect causes, excursion events, and lot status, then explaining your findings clearly.

• Review SEM findings from wafer-fabrication processes and classify defects accurately.
• Analyze yield-loss mechanisms and connect defect patterns to process issues.
• Evaluate excursion events and recommend lot holds or releases using evidence and established industry practices.
• Interpret and annotate wafer sort and test-floor data, including bin maps and parametric datasets.
• Identify defect paretos and support source-attribution analysis to trace root causes.
• Document observations and provide concise technical feedback for AI learning modules.

This is a part-time contractor role for people with practical semiconductor manufacturing experience.

• Language: Fluent in English.
• Required experience: Production wafer-fab work with SEM-based defect review and yield analysis.
• Required experience: Integrated sort or test-floor work; research cleanroom experience alone is not sufficient.
• Required skills: Defect classification, excursion management, yield improvement, and wafer sort or test-floor analysis.
• Required skills: Ability to interpret bin data and test metrics and explain technical conclusions clearly in writing and conversation.
• Relevant background: Process integration, defect engineering, or yield engineering at a semiconductor manufacturing facility.
• Former or retired fab engineers are welcome when they have directly relevant experience.