HFEPX · Eval paper review

GNN-Guided Local Refinement for Efficient Layout Decomposition with DSA-MP

Yu Feng, Liyi Zhou, Haoyu Wang, Yiming Xu +4 more

Published

Oct 15, 2026

Citations

Trust level

Low

Usefulness score

0/100 (Low)

Extraction confidence

20% (Low)

Derived from extracted protocol signals and abstract evidence.

Rater population

Not reported

Signals refreshed

Oct 15, 2026

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Should you rely on this paper?

This paper is adjacent to HFEPX scope and is best used for background context, not as a primary protocol reference.

Use this as background context only. Do not make protocol decisions from this page alone.

Abstract-only analysis, low confidence

All signals on this page are inferred from the abstract only and may be inaccurate. Do not use this page as a primary protocol reference.

This paper looks adjacent to evaluation work, but not like a strong protocol reference.
The available metadata is too thin to trust this as a primary source.
The abstract does not clearly describe the evaluation setup.
The abstract does not clearly name benchmarks or metrics.

Best use

Background context only

Use if you need

Background context only.

What to verify

Read the full paper before copying any benchmark, metric, or protocol choices.

Main weakness

This paper looks adjacent to evaluation work, but not like a strong protocol reference.

Human feedback signal

Not explicit

Not explicit in abstract metadata

Evaluation signal

Weak or implicit

Validate from full paper

Usefulness for eval research

0/100

Adjacent candidate

Treat as adjacent context, not a core eval-method reference.

If you are doing eval pipeline work, start here

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Abstract

Multiple patterning lithography (MPL) has been widely used to improve lithography resolution in advanced nodes, but it faces cost limits as feature sizes shrink. Directed self-assembly (DSA) offers a cost-effective complement, extending the resolution of optical lithography to sub-10 nm and beyond. Integrating DSA into MPL (DSA-MP) further enhances the resolution of contact/via patterning. Nevertheless, growing design complexity exposes the limits of existing decomposition methods, which struggle to balance solution quality and runtime, and neglect edge-to-edge spacing constraints of DSA templates, compromising manufacturability. To address these issues, we introduce a new conflict graph model capturing the previously overlooked constraints and develop a local refinement strategy powered by the graph neural network, enabling efficient and scalable layout decomposition. Experiments demonstrate that our method achieves higher solution quality with faster convergence than state-of-the-art methods, while maintaining robustness across layout scales, design styles, technology nodes, and varying mask counts.

What we could verify

These are the protocol signals we could actually recover from the available paper metadata. Use them to decide whether this paper is worth deeper reading.